Tool-independent Makefile generator for VHDL models.

Project Activity

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Categories

Build Tools, Simulation, Electronic Design Automation (EDA)

License

Apache License V2.0

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Additional Project Details

Operating Systems

Solaris, Linux

Intended Audience

Science/Research, Telecommunications Industry

User Interface

Command-line

Programming Language

VHDL/Verilog

Related Categories

VHDL/Verilog Build Tools, VHDL/Verilog Simulation Software, VHDL/Verilog Electronic Design Automation (EDA) Software

Registered

2007-02-28
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